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VU, Assignment No. 01 Semester: Spring 2013 CS501: Advanced Computer Architecture

VU, Assignment No. 01 Semester: Spring 2013 CS501: Advanced Computer Architecture

Assignment No. 01
Semester: Spring 2013

CS501: Advanced Computer Architecture

 

 

Total Marks: 20

Due Date:  24-04-13

 

Instructions

Please read the following instructions carefully before assignment submission.

 

 

It should be clear that your assignment will not get any credit if:

 

  • The assignment is submitted after due date.
  • The submitted assignment does not open or file is corrupt.
  • The assignment is found to be copied from Internet.
  • The assignment is found to be copied from other student.
  • The assignment submitted is not according to required file format (.doc).

 

 

Objective

The objective of this assignment is:

 

  • To assess your overall understanding of Computer Architecture and Organization
  • To assess your overall understanding of Computer Instructions
  • To assess your overall understanding of Fetch, Decode and Execute Cycle

 

 

 

Note:

 

  • The assignment should be in .doc format.
  • Assignment .01 covers lectures from 1 to 5. You are required to watch first five cs501 video lectures as well as study them from handouts to attempt this assignment.  You can also consult reference books for help.
  • Students are advised to submit their assignment as early as possible in order to avoid any sort of inconvenience like Load shedding etc.

 

Assignment

 

 

Question:

Dear Student, you are given typical view of selected Memory and Processor registers in Figure 1. In memory, you can see three instruction codes in upper area, while two data values are given in lower part. These instruction codes represent an addition operation.

Addition Operation:  You are required to perform an addition operation in which you have to add the contents of memory word at address 781 to the contents of memory word at 782. After performing this addition, result should be stored at 782. Your task is to perform step-by-step execution of these three instructions and show registers configuration at each step.

For your understanding, Step-1 of this sequence of execution is shown in Figure 1.  In this Figure, you can see PC=200 which indicate that instruction stored at address 200 is in execution and the same instruction (1781) is loaded in IR register.

 

Memory

  CPU register

200

1 7 8 1

200

PC

201

5 7 8 2

AC

202

2 7 8 2

1 7 8 1

IR

203

 

:

 

7 8 1

0 0 0 4

 

7 8 2

0 0 0 2

(STEP 1)

 

 

 

Figure-1

Where,

AC is Accumulator Register.

PC is Program Counter.

IR is Instruction Register.

 

Submission:

Solution :-

 

Memory

  CPU register

Memory

  CPU register

200

1 7 8 1

200

PC

200

1 7 8 1

201

PC

201

5 7 8 2

0004

AC

201

5 7 8 2

 0004

AC

202

2 7 8 2

1781

IR

202

2 7 8 2

 5782

IR

203

 

203

 

:

 

:

 

7 8 1

0 0 0 4

 

7 8 1

0 0 0 4

 

7 8 2

0 0 0 2

(STEP 2)

 

7 8 2

0 0 0 2

(STEP 3)

 

 

 

 

 
 

Memory

  CPU register

Memory

  CPU register

200

1 7 8 1

 1781

PC

200

1 7 8 1

 202

PC

201

5 7 8 2

 5782

AC

201

5 7 8 2

 0006

AC

202

2 7 8 2

 2782

IR

202

2 7 8 2

 2782

IR

203

 

203

 

:

 

:

 

7 8 1

0 0 0 4

 

7 8 1

0 0 0 4

 

7 8 2

0 0 0 2

(STEP 4)

 

7 8 2

0 0 0 2

(STEP 5)

 

 

 

 

 

 

 

 

Memory

  CPU register

200

1 7 8 1

202

PC

201

5 7 8 2

 0006

AC

202

2 7 8 2

2782

IR

203

 

:

 

7 8 1

0 0 0 4

 

7 8 2

0 0 0 2

(STEP 6)

 

 

 

 

 

 

VU, Assignment No. 01 Semester: Spring 2013 CS501: Advanced Computer Architecture

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